Lead, Sr FPGA Design Engineer CA
Company: L3Harris Technologies
Location: San Diego
Posted on: May 2, 2024
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Job Description:
Job Title: Lead, Sr FPGA Design Engineer
Job Code: 8724
Job Location: San Diego, CA
Job Description:
This self-motivated individual will help lead a team to develop
FPGA Firmware in the Space & Airborne Systems (SAS) Segment of
L3Harris. The SAS Segment provides critical mission solutions for
space and airborne domains with defense, intelligence, and
commercial applications. As an FPGA design engineer, you will be
directly involved in the design, integration, and test of advanced
satellite communication links, digital telemetry, signal
processing, and encryption technology.
Essential Functions:
The Lead FPGA Engineer will perform the following:
Support proposal efforts in the estimation and planning of
end-to-end FPGA development.
Decompose and allocate system and box-level requirements to FPGA
requirements and specifications.
Architect solutions against requirements and implement those
solutions in various FPGA technologies or platforms.
Lead small teams of engineers in executing FPGA development of
highly reliable and robust FPGA designs.
Follow, enforce, and refine consistent firmware development
processes across FPGA designs.
Develop HDL code for module and top level and generate appropriate
testbench and verification environments.
Map FPGA simulation work products to system-level requirements and
capabilities.
Synthesize designs to targeted technologies and perform constraint
driven place and route and analysis.
Develop FPGA simulations to verify performance and requirements,
then integrate and test the FPGA on the circuit card assembly.
Present and review technical designs internally and customer
facing.
Qualifications:
BS degree in Electrical/Computer Engineering and 9 or more years of
professional experience with firmware development, or a Graduate
Degree with a minimum of 7 years relevant firmware experience. In
lieu of a degree, minimum of 13 years of prior related
experience.
Experience with VHDL, the FPGA design process, and the tools used
to design and verify FPGA designs
Experience building FPGAs with difficult timing and/or difficult
routing constraints
Experience with standard lab equipment, including oscilloscopes,
logic analyzers, and signal generators
Preferred Additional Skills:
Experience with UVM and System Verilog
Experience with digital encryption schemes, HAIPE experience a
plus
Experience with 1553B, SpaceWire, XAUI, JESD204, I2C, SPI
interfaces
Experience with implementing Ethernet
Experience with Xilinx and Microsemi development tools
Experience with high speed processing
In compliance with pay transparency requirements, the salary range
for this role is $122,500.00 - $227,500.00. This is not a guarantee
of compensation or salary, as final offer amount may vary based on
factors including but not limited to experience and geographic
location. L3Harris also offers a variety of benefits, including
health and disability insurance, 401(k) match, flexible spending
accounts, EAP, education assistance, parental leave, paid time off,
and company-paid holidays. The specific programs and options
available to an employee may vary depending on date of hire,
schedule type, and the applicability of collective bargaining
agreements.
Keywords: L3Harris Technologies, Perris , Lead, Sr FPGA Design Engineer CA, Engineering , San Diego, California
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